// Copyright (C) 1953-2022 NUDT
// Verilog module name - tsmp_forward_table 
// Version: V3.4.0.20220225
// Created:
//         by - fenglin 
////////////////////////////////////////////////////////////////////////////
// Description:
//         use RAM to cahce the forward table
//         lookup table 
///////////////////////////////////////////////////////////////////////////

`timescale 1ns/1ps

module tsmp_forward_table
(
        i_clk                ,
        i_rst_n              ,
        
        iv_hcp_mid           ,
        iv_master_port       ,
        iv_port_ptp_enabled  ,
              
        iv_addr              , 
        iv_wdata             , 
        i_wr                 , 
        i_rd                 ,                
        o_wr                 , 
        ov_addr              , 
        ov_rdata             , 

        i_tsmp_lookup_table_key_wr       ,
        iv_tsmp_lookup_table_key         ,
        ov_tsmp_lookup_table_outport     ,
        o_tsmp_lookup_table_outport_wr   	   
);

// I/O
// clk & rst
input                  i_clk;                   //125Mhz
input                  i_rst_n;

input     [11:0]       iv_hcp_mid    ;
input     [31:0]       iv_master_port;
input     [31:0]       iv_port_ptp_enabled;
//lookup table RAM
input      [18:0]      iv_addr              ;
input      [31:0]      iv_wdata             ;
input                  i_wr                 ;
input                  i_rd                 ;            
output                 o_wr           ;
output     [18:0]      ov_addr        ;
output     [31:0]      ov_rdata       ;
//lookup table RAM
input                  i_tsmp_lookup_table_key_wr       ;
input      [47:0]      iv_tsmp_lookup_table_key         ;
output     [32:0]      ov_tsmp_lookup_table_outport     ;
output                 o_tsmp_lookup_table_outport_wr   ;

wire       [11:0]      wv_tsmpforwardram_addr_cpe2ram   ;
wire       [33:0]      wv_tsmpforwardram_wdata_cpe2ram  ;
wire                   w_tsmpforwardram_wr_cpe2ram      ;
wire       [33:0]      wv_tsmpforwardram_rdata_ram2cpe  ;
wire                   w_tsmpforwardram_rd_cpe2ram      ;

wire       [11:0]      wv_ram_raddr_notlocal_lts2ram  ;
wire                   w_ram_rd_notlocal_lts2ram      ;
wire       [33:0]      wv_ram_rdata_notlocal_lts2ram  ;

wire       [11:0]      wv_ram_raddr_local_lts2ltf     ;
wire                   w_ram_rd_local_lts2ltf         ;
wire       [33:0]      wv_ram_rdata_local_lts2ltf 	  ;
command_parse_and_encapsulate_tft command_parse_and_encapsulate_tft_inst
(
.i_clk                            (i_clk                ),
.i_rst_n                          (i_rst_n              ),

.iv_addr                          (iv_addr              ),                                           
.iv_wdata                         (iv_wdata             ),                        
.i_wr                             (i_wr                 ),         
.i_rd                             (i_rd                 ),                                                         
.o_wr                             (o_wr              ),
.ov_addr                          (ov_addr           ),
.ov_rdata                         (ov_rdata          ),

.ov_tsmpforwardram_addr            (wv_tsmpforwardram_addr_cpe2ram   ),
.ov_tsmpforwardram_wdata           (wv_tsmpforwardram_wdata_cpe2ram  ),
.o_tsmpforwardram_wr               (w_tsmpforwardram_wr_cpe2ram      ),
.iv_tsmpforwardram_rdata           (wv_tsmpforwardram_rdata_ram2cpe  ),
.o_tsmpforwardram_rd               (w_tsmpforwardram_rd_cpe2ram      )
);

local_tsmp_forward  local_tsmp_forward_inst
(
.i_clk                            (i_clk                          ),
.i_rst_n                          (i_rst_n                        ),

.iv_master_port                   (iv_master_port                 ),
.iv_port_ptp_enabled              (iv_port_ptp_enabled            ),
                                  
.iv_ram_raddr                     (wv_ram_raddr_local_lts2ltf                     ),
.i_ram_rd                         (w_ram_rd_local_lts2ltf                         ),
.ov_ram_rdata       	          (wv_ram_rdata_local_lts2ltf 		              )
);

lookup_table_sort lookup_table_sort_inst
(
.i_clk                            (i_clk                          ),
.i_rst_n                          (i_rst_n                        ),

.iv_hcp_mid                       (iv_hcp_mid                     ),
                                   
.i_tsmp_lookup_table_key_wr       (i_tsmp_lookup_table_key_wr     ),
.iv_tsmp_lookup_table_key         (iv_tsmp_lookup_table_key       ),
.ov_tsmp_lookup_table_outport     (ov_tsmp_lookup_table_outport   ),
.o_tsmp_lookup_table_outport_wr   (o_tsmp_lookup_table_outport_wr ),
                                   
.ov_ram_raddr_notlocal            (wv_ram_raddr_notlocal_lts2ram                  ),
.o_ram_rd_notlocal                (w_ram_rd_notlocal_lts2ram                      ),
.iv_ram_rdata_notlocal		      (wv_ram_rdata_notlocal_lts2ram		          ),
                                  
.ov_ram_raddr_local               (wv_ram_raddr_local_lts2ltf                     ),
.o_ram_rd_local                   (w_ram_rd_local_lts2ltf                         ),
.iv_ram_rdata_local 	          (wv_ram_rdata_local_lts2ltf 		              )
);

//`ifdef altera_ip
tdpr_singleclock_rdenab_outputaclr_w34d4096 tdpr_singleclock_rdenab_outputaclr_w34d4096_inst(
.aclr                          (!i_rst_n),
                              
.address_a                     (wv_tsmpforwardram_addr_cpe2ram),
.address_b                     (wv_ram_raddr_notlocal_lts2ram ),
                             
.clock                         (i_clk),
                             
.data_a                        (wv_tsmpforwardram_wdata_cpe2ram),
.data_b                        (34'h0),
                              
.rden_a                        (w_tsmpforwardram_rd_cpe2ram),
.rden_b                        (w_ram_rd_notlocal_lts2ram  ),
                             
.wren_a                        (w_tsmpforwardram_wr_cpe2ram),
.wren_b                        (1'b0),
                              
.q_a                           (wv_tsmpforwardram_rdata_ram2cpe),
.q_b                           (wv_ram_rdata_notlocal_lts2ram  )
);
//`endif
`ifdef xilinx_ip
truedualportram_singleclock_rdenab_outputaclr_w34d4096 truedualportram_singleclock_rdenab_outputaclr_w34d4096_inst(
.rsta                          (!i_rst_n),
.rstb                          (!i_rst_n),
 
.regcea                        (1'b1),
.regceb                        (1'b1),
 
.addra                         (wv_tsmpforwardram_addr_cpe2ram),
.addrb                         (wv_ram_raddr_notlocal_lts2ram),
                             
.clka                          (i_clk),
.clkb                          (i_clk),
                             
.dina                          (wv_tsmpforwardram_wdata_cpe2ram),
.dinb                          (34'h0),
                              
.ena                           (1'b1),
.enb                           (1'b1),
                                
.wea                           (w_tsmpforwardram_wr_cpe2ram),
.web                           (1'b0),
                              
.douta                         (wv_tsmpforwardram_rdata_ram2cpe),
.doutb                         (wv_ram_rdata_notlocal_lts2ram  )
);
`endif
endmodule